1. Field of Invention
Embodiments of the present invention relate generally to photomasks and methods of fabricating the same. More particularly, embodiments of the present invention relate to a photomask including different type regions and methods of fabricating the same.
2. Description of the Related Art
When producing semiconductor devices, contact holes or patterns are typically formed using a photolithography process. The photolithography process generally includes a process of forming a photoresist pattern by applying a photoresist film, exposing the photoresist film and developing to form a photoresist pattern. Subsequently, an underlying structure is formed into a desired pattern through an etching process using the photoresist pattern as an etch mask.
The photoresist film is conventionally exposed to light using a photomask having an opaque pattern formed on a light-transmitting substrate such as quartz. However, a conventional photomask (e.g., binary photomask or non-phase-shift photomask) has a relatively poor resolution and, therefore, has limited use in producing highly integrated semiconductor devices.
Accordingly, phase-shift photomask (PSM) having excellent resolution has been developed. In a phase-shift photomask, a phase difference of adjacent patterns may be set to 180° when light is transmitted so as to improve the resolution as compared to the non-phase shift photomask. The phase-shift photomask is used in regions having a fine line width such as a cell region. Hence, a hybrid photomask including the non-phase-shift photomask to form peripheral circuit patterns having relatively large patterns and the phase-shift photomask to form the cell patterns having relatively small patterns has been proposed.
Wafer patterns are generally not formed at an interface between the cell and peripheral circuit regions. However, the hybrid photomask has a phase difference of light at the interface region between the phase-shift photomask type region and the non-phase-shift photomask type region is 180°. Thus, a thin (e.g., narrow), stripe-shaped line pattern may be undesirably formed at the interface region due to an offset interference of light. Peeling may occur due to the undesired line pattern wherein a portion of a desired pattern (e.g., in the cell or peripheral regions) is peeled during subsequent processes. Accordingly, the undesired line pattern may act as a defect source to cause electric short-circuits in the wafer.